I am FPGA designer at MAX IV and I would like to make some questions regarding to Gennum GN4124 solution. We are working on the ALBA Electrometer which uses a SPEC board version 4, but we have some issues regarding to PCIe express throughput.
The Alba Electrometer uses alin.py script to have access to internal FPGA registers. It seems that alin.py script uses spec_lib.py script and libspec.so driver: https://www.ohwr.org/project/fmc-adc-400k18b4cha-iso-sw/tree/master/alin
The issue that I have found out is that the FPGA has received a big amount of data when I try to write or read data from some internal FPGA register.
The figures below show a alin.py data write command (Figure 1) and a ChipScope debug (Figure 2) at p2l_des block (P2L deserializer) from gn4124_core block.
The Figure 2 shows a big amount of data coming directly from the Gennum GN4124, when I asked to write 0x000000AB data to the address 0x400A (0x1005), for instance.
Maybe there is some issue at alin.py/spc_lib.py/libspec.so.
My questions are:
We would like to make sure what driver do you recommend?
Do you already have a solution that provides access to CSR and DMA interface? I’ve found a project example that uses rr.py/rawrabbit.c/rrlib.so files. Do you recommend this solution to have access to FPGA via PCI express? https://www.ohwr.org/project/gn4124-core/wikis/Documents/Project-Attachments