Question about WR Fabric interface

Dear all,

We want to use the WR Fabric interface to transfer data, and it’s a wishbone interface.
However, it seems that it is not a standard wishbone interface.Screenshot%20from%202019-03-14%2018-28-18
Our host uses AXI4 interface, and we already have a “AXI4 slave to wishbone master” HDL module.
How can we transfer data through the WR fabric interface?

We tried to use the Streamers HDL module before, but we found it will be easier to use the WR fabric interface, if it’s a standard wishbone interface.

Could you please give me some suggestions?

Thanks!

Best,
wei

I’m about to work on a similar task-- sending data from the FPGA with the WR core over the network to a PC. In my case, the data are short waveforms from a digitized detector signal (plus WR time stamps) and the ultimate destination would be a file on disk. From my reading I understand (perhaps wrongly) that there are 4 ways of sending data to the WR core for further transmission to the network:

  • plain fabric,
  • Etherbone,
  • Streamers,
  • AXI
    (AXI is not mentioned in the manual but present in the fasec reference design). I would appreciate if someone could comment on the preferred way. Are there example designs where someone has done something like this already?
    From their descriptions, Etherbone and Streamers seem to be designed to send the data to a matching FPGA with WR core on the receiving side – but receiving the data with an FPGA that then has a PCIe connection to the PC seems to be an unnecessary detour if the PC could directly receive the data over its network connection.

Thanks for your help,

Wolfgang

Hi wolfgang,

I think the AXI interface you mentioned is used to access to internal registers.
Because the AXI interface is connected to “wb_axi4lite_bridge” VHDL module, which is used to convert axi4 to wishbone master.
The converted wishbone master is connected to the external WB interface on WRPC.

best,
wei