VHDL Coding Guidelines

I’m new to OHWR. So don’t have access to the codes in the repo. I’m trying to explore and be part of it, starting with the coding guidelines. Do CERN follow the exact one at https://www.ohwr.org/project/hdl-core-lib/wikis/Documents/VHDL-coding-guidelines or is there any updated version.
One quick thought I got from it is clk’event and clk = ‘1’ instead of rising_edge(clk)
Interesting Discussion: https://forums.xilinx.com/t5/Welcome-Join/Difference-between-rising-edge-clk-and-if-clk-1-then/td-p/298387

Hi, you should have read access to clone all git repos in ohwr.org. Regarding the guidelines, you should be looking at https://www.ohwr.org/project/vhdl-style/wikis/home
I updated the link in https://www.ohwr.org/project/hdl-core-lib/wikis/Home in case that’s where you got directed to the obsolete guidelines. BTW, CERN is a big place. These guidelines are followed in the BE-CO-HT section.

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Hi. Thanks. Got the new guidelines.
I’m getting familiar and I’ll be cloning the repos. Thanks for the tip. I thought of starting with guidelines.

Is this the right place to discuss about the guidelines? I look forward for having some strong points on recommending the replacement of our company’s guideline.

PS : I remember BE-CO-HT. I couldn’t get through the first round of recruitment for firmware development. ;)

[edited]: Guideline document doesn’t have a template/reference to CERN/OHWR.

Every project in ohwr.org has an associated forum in forums.ohwr.org that you can access by clicking on the link in the left pane. For example:
Project: https://www.ohwr.org/project/vhdl-style
Wiki for the project: https://www.ohwr.org/project/vhdl-style/wikis/home
Forum associated with the project: https://forums.ohwr.org/c/vhdl-style
So I suggest you post comments questions in this last link.

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